# Xilinx Platform Cable USB

git clone git://git.zerfleddert.de/usb-driver
cd usb-driver
./setup_pcusb

# Xilinx Vivado and ISE Design Suites 2012.4

tar xf Xilinx_ISE_DS_14.4_P.49d.3.0.tar
cd Xilinx_ISE_DS_14.4_P.49d.3.0
./setup

# Xilinx Platform Studio (XPS) and Embedded Development Kit (EDK)

. /opt/Xilinx/14.4/ISE_DS/settings64.sh

/opt/Xilinx/14.4/ISE_DS/EDK/bin/lin64/xps

* Create New Project Using Base System Builder
Project File: /home/djc/xilinx/virtex4/system.xmp
[X] PLB System

* Welcome to the Bast System Builder
[X] I would like to create a new design

* Board Selection
[X] I would like to create a system for the following development board
Board Vendor: Xilinx
Board Name: Virtex 4 ML405 Evaluation Platform
Board Revision: 1

* System Configuration
[X] Single-Processor System

* Processor Configuration
Reference Clock Frequency: 100.00
Processor Type: PowerPC
Processor Clock Frequency: 300.00
Bus Clock Frequency: 100.00
On-chip Memory: None
Debug Interface: FPGA JTAG

* Peripheral Configuration
Processor 1 (PowerPC 405 Peripherals)
DDR_SDRAM
  Core: mpmc
LEDs_4Bit
  Core: xps_gpio
MGT_wrapper
  Core: mgt_protector
RS232_Uart
  Core: xps_uartlite
  Baud Rate: 9600
  Data Bits: 8
  Parity: None
  Use Interrupt [X]
SRAM
  Core: xps_mch_emc
TriMode_MAC_GMII
  Core: xps_II_temac
  Use DMA: [ ]
  Use Interrupt [X]
xps_bram_if_cntlr_1
  Core: xps_bram_if_cntlr
  Size: 8 KB

* Cache Configuration
Processor 1 (PowerPC 405 Cache)
Instruction Cache [ ]
Data Cache [ ]

* Summary
Save Base System Builder (.bsb) Settings File [X]
/home/djc/xilinx/virtex4/system.bsb
[Finish]

* System Assembly View / Addresses

Address Map for Processor ppc405_0
  (0b0100000000-0b0111111111) ppc405_0
  (0000000000-0x07ffffff) DDR_SDRAM     ppc405_0_dplb1
  (0000000000-0x07ffffff) DDR_SDRAM     ppc405_0_iplb1
  (0xf0000000-0xf000ffff) RS232_Uart    plb
  (0xf0010000-0xf001ffff) LEDs_4Bit     plb
  (0xf0020000-0xf002ffff) xps_intc_0    plb
  (0xf0070000-0xf007ffff) TriMode_MAC_GMII_fifo plb
  (0xf0080000-0xf00fffff) TriMode_MAC_GMII      plb
  (0xf0100000-0xf0101fff) xps_bram_if_cntlr_1   plb
  (0xfffe0000-0xffffffff) SRAM  plb

# Build PowerPC binaries

for(i in /sys/src/cmd/q?) {cd $i && mk install && mk clean}
cd /sys/src && objtype=power {mk nuke && mk install && mk clean}

# edit /sys/src/9/vt4/physmem.h and /sys/src/boot/vt4/physmem.h

#define	Io		0xf0000000	/* ~1MB of IO registers */
#define Uartlite	0xf0000000	/* 64 KB */
#define Gpio		0xf0010000	/* 64 KB */
#define Intctlr		0xf0020000	/* 64 KB */
#define Dmactlr		0xf0030000	/* 64 KB, unused */
#define Dmactlr2	0xf0040000	/* 64 KB, unused */
#define Llfifo		0xf0070000	/* 64 KB */
#define Temac		0xf0080000	/* 512 KB */

# DMA

You need the "XPS Central DMA Controller" (xps_central_dma)
to be able to use the TEMAC with DMA, which is not available
freely. Thus we removed from the kernel:

 - DMA support from the TEMAC driver (etherlltemac.c)
 - dma0init() and dmainit() in main.c
 - dma.c

The bootstrap doesn't support DMA.

# Build the kernel and bootstrap

cd /sys/src/boot/vt4 && mk nuke && mk install && mk clean
cd /sys/src/9/vt4 && mk nuke && mk install && mk clean

# Serial Console

con -b 9600 /dev/eia0

# Xilinx Microprocessor Debugger (XMD)

. /opt/Xilinx/14.4/ISE_DS/settings64.sh
xmd

XMD% connect ppc hw -debugdevice deviceNr 3 cpunr 1
XMD% fpga -f implementation/download.bit
XMD% dow /n/helium/power/bvirtex4.elf
XMD% run

XMD% stop
XMD% rst
XMD% dow /n/helium/power/bvirtex4.elf
XMD% run

# Relase the lock with XMD

XMD% impact -batch
cleancablelock
exit